Design of CMOS microcircuit elements fabricated by silicon-on-insulator technology with 0.5-0.35 µm design rules, with enhanced resistance to heavy charged particles

National Research Nuclear University, Moscow

122 pp.

Design of CMOS microcircuit elements fabricated by silicon-on-insulator technology with 0.5-0.35 µm design rules, with enhanced resistance to heavy charged particles — Shunkov, Valery Yevgenyevich — 2012 — Russian Dissertation Library